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Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components, P GATE and P DYNAMIC :
T B = board temperature in location as defined in
the Thermal Characteristics table.
In a full-bridge synchronous rectifier application, shown
in Figure 53, each FAN3122 drives a parallel
combination of two high-current MOSFETs, (such as
FDMS8660S). The typical gate charge for each SR
MOSFET is 70 nC with V GS = V DD = 9V. At a switching
frequency of 300 kHz, the total power dissipation is:
P TOTAL = P GATE + P DYNAMIC
(1)
P GATE = 2 ? 70 nC ? 9V ? 300 kHz = 0.378 W
(5)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
P DYNAMIC = 2 mA ? 9 V = 18 mW
P TOTAL = 0.396 W
(6)
(7)
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, V GS , with gate charge, Q G , at
switching frequency, f SW , is determined by:
P GATE = Q G ? V GS ? f SW (2)
Dynamic Pre-drive / Shoot-through Current: A
power loss resulting from internal current
consumption under dynamic operating conditions,
including pin pull-up / pull-down resistors, can be
obtained using the “IDD (No-Load) vs. Frequency”
graphs in Typical Performance Characteristics to
determine the current I DYNAMIC drawn from V DD
under actual operating conditions:
The SOIC-8 has a junction-to-board thermal
characterization parameter of ψ JB = 42°C/W. In a system
application, the localized temperature around the device
is a function of the layout and construction of the PCB
along with airflow across the surfaces. To ensure
reliable operation, the maximum junction temperature of
the device must be prevented from exceeding the
maximum rating of 150°C; with 80% derating, T J would
be limited to 120°C. Rearranging Equation 4 determines
the board temperature required to maintain the junction
temperature below 120°C:
T B,MAX = T J - P TOTAL ? ψ JB (8)
T B,MAX = 120°C – 0.396 W ? 42°C/W = 104°C (9)
P DYNAMIC = I DYNAMIC ? V DD
(3)
For comparison, replace the SOIC-8 used in the
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming ψ JB was determined for a similar thermal
design (heat sinking and air flow):
T J = P TOTAL ? ψ JB + T B (4)
where:
T J = driver junction temperature;
ψ JB = (psi) thermal characterization parameter relating
temperature rise to total power dissipation; and
? 2008 Fairchild Semiconductor Corporation
FAN3121 / FAN3122 ? Rev. 1.0.3
previous example with the 3x3 mm MLP package with
ψ JB = 2.8°C/W. The 3x3 mm MLP package can operate
at a PCB temperature of 118°C, while maintaining the
junction temperature below 120°C. This illustrates that
the physically smaller MLP package with thermal pad
offers a more conductive path to remove the heat from
the driver. Consider tradeoffs between reducing overall
circuit size with junction temperature reduction for
increased reliability.
www.fairchildsemi.com
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